Massachusetts Microprocessor and Parallel Computing Expert Witness #1279

Expert’s research interest is in integrated, pervasive computing and high performance computer architecture. Expert is developing a communications oriented language that makes it easy to integrate multiple minor applications with multiple inputs and output mechanisms. Expert is investigating the use of malleable caches as a way of making optimal use of microprocessor chip area as well as using Term Rewriting Systems as a way to specify, synthesize, and model computer architecture and protocols.
Expert has built parallel computers using free-space optical interconnection networks, as well as using custom designed network interface units. He holds a Ph.D. is published and has prior expert witness experience.

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